UF-CAM: CAM-based Fast pattern matching engine
GENERAL DESCRIPTION
LancsNet UF-CAM is a specialized engine designed for ultra-fast lookup operations. Regardless of the look-up pattern length and nature, the engine could perform a lookup every clock cycle with deterministic latency. The dual-port interface allows the update operation is performed independently without degrading lookup operation. Proprietary techniques are applied that ensures virtually zero collision rate in the most practical applications. This engine is currently adopted in the Lancsnet mainstream products.
KEY FEATURES
Features
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- Fully pipelined design for the lookup operation
- Fixed 3 cycles lookup latency and 4 cycles update/delete latency
- Virtually zero collision rate
- Support entries aging mechanism
- Fully RAM utilization**
- Support adding and checking auxiliary information
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** e.g. 1Kx36 bit entries occupy full 1 FPGA BRAM
Configurability
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- Look-up length
- Number look-up entries
- Entries aging period (optional)
- Hash function
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Technology Agnostic
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- VHDL source code available, designed and tested for FPGA* and ASIC
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* In production with customers
Example Implementation – LancsNet UF-CAM (synthesize on Kintex7 XC7K325T)
| Family | Part |
Fmax (MHz) |
LUT | LUTRAM | FF | BRAM | DSP | IP Config |
| Kintex7 | XC7K325T | 289.0 | 349 | 0 | 110 | 7.5 | 0 | 8K entries x 32-bit |
| Kintex7 | XC7K325T | 284.6 | 693 | 0 | 177 | 14.5 | 0 | 8K entries x 64-bit |
| Kintex7 | XC7K325T | 259.6 | 1373 | 0 | 320 | 28.5 | 0 | 8K entries x 128-bit |
| Kintex7 | XC7K325T | 265.9 | 698 | 0 | 126 | 14.5 | 0 | 16K entries x 32-bit |
| Kintex7 | XC7K325T | 273.9 | 1388 | 0 | 194 | 28.5 | 0 | 16K entries x 64-bit |
| Kintex7 | XC7K325T | 252.7 | 2748 | 0 | 374 | 57.0 | 0 | 16K entries x 128-bit |
APPLICATIONS
Computing engine in major network devices (L2, L3 switch, router, NGFW), data compression, Intrusion prevention system, Hardware accelerator for pattern searching/matching, Artificial neural network, Hardware-based deep packet investigation.
An example application of the UF-CAM in Router/Switch MAC lookup
DELIVERABLES
The IP core and the simulation testbench are provided with extensive documentation and technical support from our technical teams. By default, the encrypted format IP core is provided, full source code is available for interested partners/developers under a specific agreement
FOR DEMO ON HARDWARE AND SIMULATION
Contact us sales@lancsnet.com
PRICING AND FURTHER INFORMATION
Request for quote & datasheet at sales@lancsnet.com
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