Shared memory IP: Parallel packet buffering architecture

GENERAL DESCRIPTION

LancsNet parallel shared memory (PSM) IP is an innovative and high-performance packet buffer IP that is well suited for high and ultra-high bandwidth (up to 200 Gbps) applications. The memory is design to buffer multiple Ethernet streams simultaneously and eliminates the need for local line card buffers as well as avoiding HOL blocking effect. The design is highly configurable and is provided a convenient AMBA 4 AXI4-Stream interface for easy system integration.

sh2
KEY FEATURES

Features

        • Supports variable packet length from 64 bytes to 9600 bytes.
        • AMBA 4 AXI4-Stream compatible
        • Fault-tolerant and soft-error auto-recovery (optional with extra logic overhead)
        • Status monitoring (optional with extra logic overhead)
        • Supporting hierarchy design for ultra-high bandwidth and the large number of streams
        • Raw packet latency: 512 ns/6,144 ns 64-byte/1514-byte packets (for 32x interfaces)
        • Max ~200 Gbps-level switching capacity
        • Support max 64 channel IDs

Configurability

        • Core bus size from 64÷4,096 bit
        • Memory size: depending on the availability
        • Extra reliability features
        • Number of input streams

Technology Agnostic

        • VHDL source code available, designed and tested for FPGA* and ASIC ready

* In production with customers

Example Implementation – LancsNet PSM

Family Part

Fmax

(MHz)

LUT LUTRAM FF BRAM DSP IP Config
Artix7 XC7A200T 170 1288 0 2291 61 0

512-bit, 256KB,

32 interfaces

Kintex7 XC7K325T 238 1288 0 2291 61 0

512-bit,  256KB,

32 interfaces

Virtex7 XC7VX550T 282 1288 0 2291 61 0

512-bit,  256KB,

32 interfaces

Artix7 XC7A200T 172 1359 65 3222 136 0

512-bit,  512KB,

32 interfaces

Kintex7 XC7K325T 236.1 1359 65 3222 136 0

512-bit,  512KB,

32 interfaces

Virtex7 XC7VX550T 248.5 1359 65 3222 136 0

512-bit,  512KB,

32 interfaces

Artix7 XC7A200T 172 1308 65 4546 264 0

1024-bit, 1024KB,

32 interfaces

Kintex7 XC7K325T 240.3 1308 65 4546 264 0

1024-bit, 1024KB,

32 interfaces

Virtex7 XC7VX550T 249.8 1308 65 4546 264 0

1024-bit, 1024KB,

32 interfaces

    APPLICATIONS

    L2, L3 switch and routers, NGFW, network aggregator, network accelerators, network tapping

    An example application of the PSM IP in L2 switch

    sh2 app
    DELIVERABLES

    The IP core and the simulation testbench are provided with extensive documentation and technical support from our technical teams. By default, the encrypted format IP core is provided, full source code is available for interested partners/developers under a specific agreement

    FOR DEMO ON HARDWARE AND SIMULATION
    PRICING AND FURTHER INFORMATION

    Request for quote & datasheet at sales@lancsnet.com