RO-PUF: Physically Unclonable Functions for critical security applications
GENERAL DESCRIPTION
LancsNet RO-PUF is a patented design of Ring Oscillator Physically-unclonable Functions (PUFs) which allow extracting the unique device pattern. This is targeted for critical security applications including but not limited to: hardware authentication (ID authentication), unpredictable PRNG, unique unclonable key generator.
KEY FEATURES
Features
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- High level of randomness (~49.5%)
- Stability: completely independent from operation condition (V, T) for ID extraction
- Very lightweight design, 32LUT/1RO
- Support partial reconfiguration for resource optimization.
- Include extraction circuit (optional)
- Include key generation circuit (optional)
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Configurability
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- RO length
- Number of Ros
- ID/Key length
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Technology Agnostic
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- VHDL source code available, designed and tested for FPGA* and ASIC
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* In production with customers
Example Implementation – LancsNet RO-PUF Engine (32 x 32 ROs)
| Family | Part |
Fmax (MHz) |
LUT | LUTRAM | FF | BRAM | DSP | IP Config |
| Artix7 | XC7A200T | – | 288 | – | – | – | – | 32 x 8-stages ROs |
| Kintex7 | XC7K325T | – | 1056 | – | – | – | – | 32 x 32-stages ROs |
| Virtex7 | XC7VX550T | – | 2080 | – | – | – | – | 32 x 64-stages ROs |
APPLICATIONS
Device ID extraction/authentication, secure key generation, security-critical applications, anonymous computation, software licensing, trust computing platform
An example application of the RO-PUF in ID authentication application
DELIVERABLES
The IP core and the simulation testbench are provided with extensive documentation and technical support from our technical teams. By default, the encrypted format IP core is provided, full source code is available for interested partners/developers under a specific agreement
FOR DEMO ON HARDWARE AND SIMULATION
Contact us sales@lancsnet.com
PRICING AND FURTHER INFORMATION
Request for quote & datasheet at sales@lancsnet.com
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